====== IPAC'13 feature list ====== Many new features have been proposed or discussed during IPAC'13. Some of these were already in development, of course. ===== Implemented ===== ==== Raw data dump ==== Added continuous dump mode. If dump is enabled, it is performed right after the acquisition, cutting the latency by 0.5 seconds. Each raw data set will only be dumped once. ==== Trigger polarity ==== Enables the user to trigger on the rising or falling edge of the external trigger input. Implemented as inversion of the external trigger under configuration register control. Introduced in FPGA gateware revision **3.08**. ==== Trigger level capture ==== During each acquisition, capture the values of the external trigger inputs. The values captured are after trigger polarity processing, so the active trigger input should always be captured as 1. Added in FPGA gateware revision **3.08**. ==== Drive modulation ==== Time-domain drive enable - links drive enable to grow/damp signal. Basically, we can have 3 modes: - No modulation (drive on or off, old behavior) - Drive enabled during growth period, disabled otherwise - Drive disabled during growth period, enabled otherwise The last mode provides a way to pump up a particular mode in closed-loop operation, then measure its open-loop trajectory without interference from the drive signal. The second option can be used to drive the beam for a period of time, then observe the response. Note that the feedback can stay on throughout the event --- just configure two coefficient sets the same. Implemented in FPGA gateware revision **3.09**. ==== Four coefficient sets, bunch-by-bunch control ==== Extended from two to four independent coefficient sets. One select bit is still linked to grow/damp signal. The other is driven by a bunch-by-bunch mask. The obvious applications are: * Two feedback sets for different bunch types (normal/camshaft, for example); * Grow/damp on a subset of the bunches Implemented in FPGA gateware revision **3.10**. ==== Peak kick ==== Add monitoring of the peak kick amplitude to the 1(nbsp)Hz poll. Implemented in FPGA gateware revision **3.15** ===== Planned ===== ===== BIC 2013 additions ===== ==== Trigger daq on drive sweep ==== Provide internal trigger to be used sync with drive sweep. Note this is complementary to "Drive modulation" above. ==== Restrict/report max RMS channel ==== If possible restrict max RMS search for waveform display to FFT restriction (e.g. select highest RMS bunch from multibunch train, ignoring camshaft bunches). Report selected bunch number. ==== Tune lock ==== Lock drive freq. to follow tune variations.